product brief august 2000 L9310 line interface and line access circuit full-feature slic, ringing relay, and test access device introduction the L9310 is a combination full-feature, ultralow- power slic, solid-state ringing access relay, and line test matrix. it is part of a pin-for-pin compatible family of devices designed to serve a wide variety of appli- cations. the L9310 is optimized for european access applications and north american access where per-line testing and ta-909 longitudinal bal- ance are required. features slic n 5 v and battery operation n optional automatic battery switch n 15 operational and test modes n appropriate for 46 db longitudinal balance applica- tions n minimal external components required at all inter- faces n ultralow power dissipation n software/hardware adjustable dc parameters and supervision thresholds n meter pulse compatible n ground start/ground key compatible solid-state ring relay n low impulse noise n current-limited switches/thermal protection line test matrix n single-ended or differential measurements n current or voltage sense n ac or dc measurements n dedicated analog input and output applications n pair gain n digital loop carrier (dlc) n central office (co) n fiber-in-the-loop (fitl) description the L9310 electronic line interface and line access circuit (lilac) provides all the functions that are nec- essary to interface a codec to the tip and ring of a subscriber loop, integrating the battery feed and ring- ing access relay and line test access in one low- power, low-cost package. the L9310 requires a 5 v and battery supply to oper- ate. included is an automatic battery switch. the bat- tery feed offers forward and reverse battery, on-hook transmission, ground start, ground key, and meter pulse operational modes. it also has a low-power scan and a disconnect mode. in all operating states, this ic is designed for minimal power dissipation. this device is designed to mini- mize the number of external components required at all interfaces. the dc template, current limit, and overhead voltage and loop supervision threshold are programmable via an applied voltage source. the voltage source may be an external programmable voltage source or derived from the v ref slic output. the integrated solid-state switch offers power ringing access. impulse noise is minimized, thus eliminating the need for external zero-cross switching circuitry. the L9310 provides line test capability. the differen- tial or single-ended ac and dc line voltage or current may be measured by the L9310.
l u cent t e chnolo g ies inc . res e rves t he r i g ht t o mak e cha n ges t o th e pro d uct(s ) o r info r matio n cont a ined h erei n withou t notice . n o liabilit y i s assu m ed as a r esult o f thei r use or a pplicatio n . no r ights u n der a ny pa t ent acc o mpa n y the s a le of a ny such p rod u ct(s ) or in f orm a tion. co p yrigh t ? 200 0 luce n t t echn o logies i n c. all rights res e rved augu s t 2000 p b 00-126 a lc ( r ep l a c e s p b 00-070al c ) f o r a d d i ti o n a l i n fo r m a t i o n , c o n ta c t y o u r m i c r o e l e c t r o n i c s g r o u p a cc o u n t m a n a ge r o r t h e f o l l o wi n g: i n terne t : http://ww w .lucent.com/micro e-m a il: do c m a ste r @mi c ro . luc e nt.com n . a m e r ic a : m i c r o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s i n c ., 5 5 5 u n i o n b o u l e v a r d , r o o m 3 0 l - 1 5 p - b a , a l l e nt o wn , p a 1 8 1 0 9 - 3 2 86 1 - 80 0 - 37 2 - 2 4 4 7 , f a x 6 1 0 - 7 1 2 - 4 10 6 ( i n c a n a d a : 1 - 8 0 0 - 5 5 3 - 2 44 8 , f a x 6 1 0 -7 1 2 - 4 1 0 6 ) a s i a p a cif i c : m i c r o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s s i ng a p o r e p t e . l t d., 7 7 s c i e n c e p a r k d r i v e, #0 3 - 1 8 c i nt e c h i i i, s i n g a p o r e 1 1 8 2 56 t el . ( 6 5 ) 77 8 8 83 3 , f a x ( 6 5 ) 7 7 7 74 9 5 c h i n a: m i c r o e l e c t r o n i cs g r o u p, l u c e n t t e c h n o l og i e s ( c h i na ) c o., l td . , a - f 2 , 2 3 / f , za o fo n g u n i v e r s e b u i l d i n g , 1 8 0 0 zh o ng s h an x i r o a d , s h a n g h ai 2 00 2 3 3 p . r. ch i na t e l . ( 8 6 ) 2 1 6 4 4 0 0 4 6 8 , e x t . 3 2 5 , f a x ( 86 ) 21 64 4 0 06 5 2 j a p a n : m i cr o e l e c t r o n i cs g r o u p, l u c e nt t e c hn o l o g i e s j a pa n l t d., 7 - 1 8 , h i g a s h i - got a n d a 2 - c h o m e, s h i n a g aw a - k u , t o k y o 1 4 1, j a p a n t e l . ( 8 1) 3 5 4 21 1 60 0 , f a x ( 8 1 ) 3 5 4 2 1 17 0 0 e u r op e : d at a r e qu e s t s : m ic r o e l e ct r oni c s g r ou p d a t a l i n e : t el . ( 44 ) 70 0 0 5 8 2 3 6 8 , f a x ( 44 ) 1 1 8 9 3 2 8 1 48 t e c h n i c a l in q u i r i e s : g e r ma n y : ( 4 9 ) 89 9 5 0 8 6 0 (munich ) , united kingdom: ( 4 4 ) 1 3 4 4 8 6 5 9 0 0 ( a scot) , f r a n ce: ( 3 3 ) 1 4 0 8 3 6 8 0 0 (p a r i s), s we d e n : ( 4 6) 8 5 9 4 6 07 00 (stockholm), f inl a nd: ( 3 5 8 ) 9 4 3 5 4 2 80 0 ( h e l si n ki ) , i t a l y : ( 3 9 ) 0 2 6 6 0 8 13 1 (m i l a n ) , s p a i n : ( 3 4 ) 1 8 0 7 1 4 4 1 (madrid) product brief august 2000 full-feature slic, ringing rela y , and t est access device L9310 line interface and line access circuit application 1 2-3 5 27 k ( f ) r s1 fusible 50 w c vb a t1 0.1 m f v b a t1 rcvn r t s v pr o g l c t h v b a t c f2 0 . 1 m f v t x rcvp v f r op v f x in v f r on dx0 dr1 fs bclk dgnd v dd pcm h i ghway sync and c l ock i t r p p mout c r t s 0 . 1 m f p pmin agn d v dd 1 m w 50 w r r i ng 1 0 0 v 130 v secondary o r p t c fusible o r p t c r r t f 400 w ring i ng source c cc 0.1 m f v cc c dd 0.1 m f v dd ad c tx 0 . 1 m f r gx 6. 3 4 k w c c1 r s w pt v b a t 2 / v c c bgn d v ba t 1 dgnd txi v i tr prot e ctor 1 8 0 v 330 v secondary prot e ctor v ref v ref tes t lev te s ts i g c f 2 to / from micropr o c e ssor v b a t2 c v ba t 2 0 . 1 m f c ppm 0. 0 1 m f r p p m 17 . 4 k w ramped ppm genera t i o n 0 . 7 v r m s f o r 2 . 2 v r ms a t t /r volt a ge control pwr t ring reset s l i c 0a s l i c 5a ns t at b1 b2 s l i c 3a s l i c 4a s l i c 2a b3 b0 s l i c 1a dr0 dx1 t8536 cv dd 0 . 1 m f v dd l93 1 0 (gain of 2) pr 0.1 m f r eset r lc t h
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